1. Field of the Invention
The present invention relates to a digital broadcasting receiver for dual video decoding, and more particularly, to a video buffer control apparatus for dual video decoding of an MPEG2 video decoder.
2. Discussion of the Related Art
Currently, it is a worldwide tendency for digital broadcasting that is already on-air or is ready to launch. Mostly, the digital broadcasting adopts MPEG2 (moving picture experts group 2) as a video standard. An interlacing video mode specification having 1920 (pixels)*1080 (lines) or a progressive mode specification having 1280 (pixels)*720 (lines) corresponds to a main profile high level (MP@HL) specification of MPEG2.
In such a case, a bit rate after compression can have a value close to 20 M/sec. And, a corresponding compression stream includes audio data, video data, and general data for broadcasting information or data broadcasting. Moreover, the video data among them occupy the largest volume in general.
An MPEG2 video decoder in a digital TV receiver is currently implemented by ASIC chip type hardware. Lately, many efforts are made to research and develop a system-on-chip (SOC) that implements a data processing system of the digital TV receiver, which includes an MPEG2 video decoder, audio decoder, video display processor (VDP), on-screen display controller, graphic accelerator, central processor unit, and the like, with one chip. Previously, a data buffer memory is used for a data processing system chip and an operation memory is used for an external CPU. Yet, a current SOC type data processing system chip has a unified memory structure that uses one memory as the operation and data buffer memories.
In such an SOC implementation, it is essential to implement each block having the same function of the previous one with a minimum occupied area in integrating various kinds of hardware on one chip.
In this case, an MPEG encoder of a transmitting side performs compression encoding on high quality video data by applying variable length coding, discrete cosine transform, quantization, motion compensation, and the like thereto.
The compression-encoded video data are multiplexed with audio data and additional data containing general data therein and the like and are then transmitted via a terrestrial wave, cable, satellite, or the like.
A system decoder of a digital TV receiver then separates video, audio, additional data streams from a multiplexed transport (TP) stream through demultiplexing. And, the separated video and audio streams are outputted to a video decoder and an audio decoder, respectively. Moreover, the separated additional data stream is stored in a memory and is then processed by a CPU through software.
In being separated by the system decoder, the video stream, which is real-time data, should be directly outputted to the video decoder via internal buffers for separation of partial packets only without time delay.
Yet, a buffer delay considered by the MPEG encoder of the transmitting side occurs until the video stream is decoded by the video decoder to be displayed. Hence, the video stream needs to be stored in the memory. Thus, the video stream is temporarily stored in the video buffer and is then outputted to the video decoder.
In doing so, the video buffer can be configured to be independent from an external memory or to be built in the external memory. Namely, if the memory is a unified memory, a video buffer area is allocated to the memory and the video stream is stored in the video buffer in the memory. If so, the video decoder reads the video stream stored in the video buffer at an appropriate time to perform video decoding thereon. Namely, the video decoder makes a read request to the video buffer at the appropriate time to match a decoding time intended by the MPEG encoder of the transmitting side, whereby synchronization between audio and video can be achieved.
Meanwhile, as digital broadcasting is performed on a full scale in each country worldwide, it is taken into consideration that two channels are simultaneously viewed on one display screen or that one channel is viewed while another channel is recorded.
For such a consideration, a digital TV receiver mostly performs dual video decoding using a pair of video decoders.
However, video buffer controllers for storing a video stream outputted from a system decoder in a video buffer or reading the video stream from the video buffer to output to a video decoder are needed as many as a number of video decoders. For instance, in case of dual video decoding using a pair of video decoders, a pair of video buffer controllers are needed.